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SASP
2009
IEEE
222views Hardware» more  SASP 2009»
15 years 6 months ago
A memory optimization technique for software-managed scratchpad memory in GPUs
—With the appearance of massively parallel and inexpensive platforms such as the G80 generation of NVIDIA GPUs, more real-life applications will be designed or ported to these pl...
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh
IEEEPACT
2009
IEEE
15 years 6 months ago
Oblivious Routing in On-Chip Bandwidth-Adaptive Networks
—Oblivious routing can be implemented on simple router hardware, but network performance suffers when routes become congested. Adaptive routing attempts to avoid hot spots by re-...
Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel...
DAC
2010
ACM
14 years 12 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun...
ICDCS
2012
IEEE
13 years 2 months ago
G-COPSS: A Content Centric Communication Infrastructure for Gaming Applications
—With users increasingly focused on an online world, an emerging challenge for the network infrastructure is the need to support Massively Multiplayer Online Role Playing Games (...
Jiachen Chen, Mayutan Arumaithurai, Xiaoming Fu, K...
119
Voted
HIPC
2009
Springer
14 years 9 months ago
Integrating and optimizing transactional memory in a data mining middleware
As the size of available datasets in various domains is growing rapidly, there is an increasing need for scaling data mining implementations. Coupled with the current trends in co...
Vignesh T. Ravi, Gagan Agrawal