Research in the field of examination timetabling has developed in two directions. The first looks at applying various methodologies to induce examination timetables. The second tak...
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
Abstract. The purpose of this work is to demonstrate that it is possible to cluster contact maps for pairs of alpha helices such that each of the clusters corresponds to a group of...
In this paper we present a method for determining optimal routes along selected paths in a wireless mesh network based on an interference aware delay analysis. We develop an analyt...
In this paper, we present a checkpoint-based scheme to improve the turnaround time of bag-of-tasks applications executed on institutional desktop grids. We propose to share checkp...