Statistical static timing analysis (SSTA) has become a key method for analyzing the effect of process variation in aggressively scaled CMOS technologies. Much research has focused...
Today's software systems communicate over the Internet using standard protocols that have been heavily scrutinized, providing some assurance of resistance to malicious attack...
Octavian Udrea, Cristian Lumezanu, Jeffrey S. Fost...
A latch-based timing analyzer is an essential tool for developing high-speed pipeline designs. As process variations increasingly influence the timing characteristics of DSM desi...
Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, San...
Knowing which method parameters may be mutated during a method’s execution is useful for many software engineering tasks. We present an approach to discovering parameter referen...
Shay Artzi, Adam Kiezun, David Glasser, Michael D....
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...