Sciweavers

2844 search results - page 556 / 569
» A Comparison of Partitioning Operating Systems for Integrate...
Sort
View
DSN
2011
IEEE
13 years 11 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
VEE
2012
ACM
187views Virtualization» more  VEE 2012»
13 years 7 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
15 years 4 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
SP
2010
IEEE
220views Security Privacy» more  SP 2010»
15 years 3 months ago
TaintScope: A Checksum-Aware Directed Fuzzing Tool for Automatic Software Vulnerability Detection
—Fuzz testing has proven successful in finding security vulnerabilities in large programs. However, traditional fuzz testing tools have a well-known common drawback: they are in...
Tielei Wang, Tao Wei, Guofei Gu, Wei Zou
ICPR
2000
IEEE
16 years 23 days ago
A Quick 3D-2D Registration Method for a Wide-Range of Applications
Amethod for quick determination of the position and pose of a 3D free-form object with respect to its 2D projective image(s) is proposed. It is a precondition of the method that a...
Yasuyo Kita, Nobuyuki Kita, Dale L. Wilson, J. Ali...