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» A Component Architecture for FPGA-Based, DSP System Design
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ASPDAC
2006
ACM
122views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Reusable component IP design using refinement-based design environment
- We propose a method of enhancing the reusability of the component IPs by separating communication and computation for a system function. In this approach, we assume that the comp...
Sanggyu Park, Sang-yong Yoon, Soo-Ik Chae
111
Voted
CCECE
2006
IEEE
15 years 5 months ago
A Hardware/Software Co-Design for RSVP-TE MPLS
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
Raymond Peterkin, Dan Ionescu
DAC
1997
ACM
15 years 3 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
CIMCA
2008
IEEE
15 years 6 months ago
Usability-Focused Architectural Design for Graphical User Interface Components
Although in recent years some progress in software engineering (SE) and human-computer interaction (HCI) has been made, there is still a gap between the two research areas and the...
Stephan Bode, Matthias Riebisch
FCCM
2005
IEEE
102views VLSI» more  FCCM 2005»
15 years 5 months ago
A Signature Match Processor Architecture for Network Intrusion Detection
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructu...
Janardhan Singaraju, Long Bu, John A. Chandy