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NIXDORF
1992
116views Hardware» more  NIXDORF 1992»
15 years 5 months ago
Programmable Active Memories: A Performance Assessment
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
Patrice Bertin, Didier Roncin, Jean Vuillemin
TASE
2008
IEEE
15 years 1 months ago
Integrated Supervisory and Operational Control of a Warehouse With a Matrix-Based Approach
This paper considers a matrix-based discrete event control approach for a warehouse. The control system is organized in two modules: a dynamic model and a controller. The model pro...
Vincenzo Giordano, Jing Bing Zhang, David Naso, Fr...
PERCOM
2008
ACM
16 years 1 months ago
Composition and Generalization of Context Data for Privacy Preservation
This paper presents preliminary results on anonymization and obfuscation techniques to preserve users' privacy in context-aware service provisioning. The techniques are based...
Linda Pareschi, Daniele Riboni, Alessandra Agostin...
WCET
2008
15 years 2 months ago
On Composable System Timing, Task Timing, and WCET Analysis
The complexity of hardware and software architectures used in today's embedded systems make a hierarchical, composable timing analysis impossible. This paper describes the so...
Peter P. Puschner, Martin Schoeberl
FPL
2009
Springer
107views Hardware» more  FPL 2009»
15 years 6 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...