6409 search results - page 633 / 1282 » A Computational Algorithm for Origami Design |
157
Voted
DAC
2005
ACM
2005
ACM
Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction
16 years 8 months ago
To reduce power, Vdd programmability has been proposed recently to select Vdd-level for interconnects and to powergate unused interconnects. However, Vdd-level converters used in ...
188
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VLSID
2009
IEEE
16 years 7 months ago
2009
IEEE
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...
193
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MOBIHOC
2009
ACM
16 years 7 months ago
2009
ACM
In this demo we present the Wireless Open-Access Research Platform for Networks (WARPnet), a research testbed aimed at performing experiments at the network level. The platform is...
177
Voted
ICNP
2007
IEEE
16 years 1 months ago
2007
IEEE
- A Network Court Protocol is designed for malicious node conviction based on information from network node accusing and testifying operations, which are formally modeled by algebr...
189
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ADHOCNOW
2006
Springer
16 years 1 months ago
2006
Springer
We consider an ad-hoc network consisting of devices that try to gain access for transmission through a shared communication channel. We redesign randomized protocol of Cai, Lu and ...