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IEEEPACT
2007
IEEE
15 years 10 months ago
Performance Portable Optimizations for Loops Containing Communication Operations
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
Costin Iancu, Wei Chen, Katherine A. Yelick
PLDI
2003
ACM
15 years 9 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
16 years 22 days ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou
SAC
2006
ACM
15 years 9 months ago
Distributed context management in a mobility and adaptation enabling middleware (MADAM)
CT As computing devices are getting smaller, we tend to bring them everywhere. Consequently the operating conditions of the devices are constantly changing (e.g. changing user requ...
Marius Mikalsen, Nearchos Paspallis, Jacqueline Fl...
ESCIENCE
2006
IEEE
15 years 10 months ago
Characterization of Computational Grid Resources Using Low-Level Benchmarks
An important factor that needs to be taken into account by end-users and systems (schedulers, resource brokers, policy brokers) when mapping applications to the Grid, is the perfo...
George Tsouloupas, Marios D. Dikaiakos