84 search results - page 7 / 17 » A Configurable Logic Architecture for Dynamic Hardware Softw... |
CODES
2002
IEEE
15 years 4 months ago
2002
IEEE
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
111
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DSN
2009
IEEE
15 years 6 months ago
2009
IEEE
Dynamic Information Flow Tracking (DIFT) is a promising security technique. With hardware support, DIFT prevents a wide range of attacks on vulnerable software with minimal perfor...
CODES
2003
IEEE
15 years 4 months ago
2003
IEEE
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
120
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TCAD
2008
14 years 11 months ago
2008
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
CODES
1999
IEEE
15 years 3 months ago
1999
IEEE
Reducing power consumption is critical in many system designs. Dynamic power management is an effective approach to decrease power without significantly degrading performance. Pow...