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HIPC
2004
Springer
15 years 3 months ago
Parallel Performance of Hierarchical Multipole Algorithms for Inductance Extraction
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
Hemant Mahawar, Vivek Sarin, Ananth Grama
LCPC
2004
Springer
15 years 3 months ago
Implementation of Parallel Numerical Algorithms Using Hierarchically Tiled Arrays
In this paper, we describe our experience in writing parallel numerical algorithms using Hierarchically Tiled Arrays (HTAs). HTAs are classes of objects that encapsulate parallelis...
Ganesh Bikshandi, Basilio B. Fraguela, Jia Guo, Ma...
TOG
2010
118views more  TOG 2010»
14 years 4 months ago
A hierarchical volumetric shadow algorithm for single scattering
Volumetric effects such as beams of light through participating media are an important component in the appearance of the natural world. Many such effects can be faithfully modele...
Ilya Baran, Jiawen Chen, Jonathan Ragan-Kelley, Fr...
ICS
1999
Tsinghua U.
15 years 2 months ago
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
José F. Martínez, Josep Torrellas, J...
FBT
1998
119views Formal Methods» more  FBT 1998»
14 years 11 months ago
Modeling a Production Cell as a Distributed Real-Time System with Cottbus Timed Automata
We build on work in designing modeling languages for hybrid systems in the development of CTA, the Cottbus Timed Automata. Our design features a facility to specify a hybrid system...
Dirk Beyer, Heinrich Rust