233 search results - page 6 / 47 » A Counterflow Pipeline Experiment |
EURODAC
1994
IEEE
15 years 3 months ago
1994
IEEE
The use of a realistic component library with multiple implementations of operators, results in cost ef cient designs; slow components can then be used on non-critical paths and t...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
—In this paper, we propose a multi-task mapping/scheduling technique for heterogeneous and scalable MPSoC. To utilize the large number of cores embedded in MPSoC, the proposed te...
CLUSTER
2007
IEEE
15 years 6 months ago
2007
IEEE
— In this paper we give a theoretical model for determining the synchronization frequency that minimizes the parallel execution time of loops with uniform dependencies dynamicall...
PPOPP
2012
ACM
13 years 7 months ago
2012
ACM
CPHASH is a concurrent hash table for multicore processors. CPHASH partitions its table across the caches of cores and uses message passing to transfer lookups/inserts to a partit...
ISSS
1997
IEEE
15 years 3 months ago
1997
IEEE
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...