714 search results - page 33 / 143 » A Decompression Architecture for Low Power Embedded Systems |
99
Voted
ICCD
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract— Microcode enables programmability of (micro) architectural structures to enhance functionality and to apply patches to an existing design. As more features get added to...
114
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DFT
1999
IEEE
15 years 4 months ago
1999
IEEE
In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...
102
Voted
DAC
2005
ACM
15 years 2 months ago
2005
ACM
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
ETS
2007
IEEE
15 years 2 months ago
2007
IEEE
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
105
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MICRO
2002
IEEE
15 years 5 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...