Sciweavers

714 search results - page 39 / 143
» A Decompression Architecture for Low Power Embedded Systems
Sort
View
78
Voted
GECCO
2003
Springer
103views Optimization» more  GECCO 2003»
15 years 5 months ago
Evaluation of Parameter Sensitivity for Portable Embedded Systems through Evolutionary Techniques
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
James Northern III, Michael A. Shanblatt
DAC
2002
ACM
16 years 1 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
90
Voted
ESANN
2004
15 years 1 months ago
BIOSEG: a bioinspired vlsi analog system for image segmentation
: The architecture of a complete image segmentation system and the development of an embedded VLSI low-power integrated circuit are reported. A neuromorphic engineering approach is...
Jordi Madrenas, Jordi Cosp, Lucas Oscar, Eduard Al...
WMPI
2004
ACM
15 years 6 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
108
Voted
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
16 years 27 days ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel