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» A Decompression Architecture for Low Power Embedded Systems
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DAC
2010
ACM
15 years 4 months ago
Quality metric evaluation of a physical unclonable function derived from an IC's power distribution system
The level of security provided by digital rights management functions and cryptographic protocols depend heavily on the security of an embedded secret key. The current practice of...
Ryan Helinski, Dhruva Acharyya, Jim Plusquellic
113
Voted
CODES
2008
IEEE
15 years 21 days ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
117
Voted
MICRO
1999
IEEE
102views Hardware» more  MICRO 1999»
15 years 4 months ago
Evaluation of a High Performance Code Compression Method
Compressing the instructions of an embedded program is important for cost-sensitive low-power control-oriented embedded computing. A number of compression schemes have been propos...
Charles Lefurgy, Eva Piccininni, Trevor N. Mudge
HIPEAC
2005
Springer
15 years 6 months ago
A Single (Unified) Shader GPU Microarchitecture for Embedded Systems
We present and evaluate the TILA-rin GPU microarchitecture for embedded systems using the ATTILA GPU simulation framework. We use a trace from an execution of the Unreal Tournament...
Victor Moya Del Barrio, Carlos González, Jo...
CODES
2005
IEEE
15 years 2 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang