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» A Decompression Architecture for Low Power Embedded Systems
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108
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CODES
2008
IEEE
15 years 7 months ago
Distributed and low-power synchronization architecture for embedded multiprocessors
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
Chenjie Yu, Peter Petrov
CSREAESA
2006
15 years 1 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
ASPLOS
2012
ACM
13 years 8 months ago
DreamWeaver: architectural support for deep sleep
Numerous data center services exhibit low average utilization leading to poor energy efficiency. Although CPU voltage and frequency scaling historically has been an effective mea...
David Meisner, Thomas F. Wenisch
RTCSA
1999
IEEE
15 years 4 months ago
Scalable Architecture for Real-Time Applications and Use of Bus-Monitoring
The lifecycle for industrial applications are becoming shorter, the application complexity increases, performance is to low, fault tolerance is required, reuse of components is de...
Tommy Klevin, Lennart Lindh
110
Voted
ICCAD
1998
IEEE
120views Hardware» more  ICCAD 1998»
15 years 4 months ago
Communication synthesis for distributed embedded systems
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
Ross B. Ortega, Gaetano Borriello