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» A Decompression Architecture for Low Power Embedded Systems
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ICCAD
2003
IEEE
325views Hardware» more  ICCAD 2003»
15 years 5 months ago
Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
Brian Swahn, Soha Hassoun
VLSISP
2008
239views more  VLSISP 2008»
15 years 14 days ago
An Embedded Real-Time Surveillance System: Implementation and Evaluation
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Pe...
LCTRTS
1998
Springer
15 years 4 months ago
Using UML for Modeling Complex Real-Time Systems
The embedded real-time software systems encountered in applications such as telecommunications, aerospace, and defense typically tend to be large and extremely complex. It is cruc...
Bran Selic
SC
2004
ACM
15 years 6 months ago
A Performance and Scalability Analysis of the BlueGene/L Architecture
This paper is structured as follows. Section 2 gives an architectural description of BlueGene/L. Section 3 analyzes the issue of “computational noise” – the effect that the o...
Kei Davis, Adolfy Hoisie, Greg Johnson, Darren J. ...
CORR
2006
Springer
116views Education» more  CORR 2006»
15 years 18 days ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...