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» A Decompression Architecture for Low Power Embedded Systems
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ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
15 years 4 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
EMSOFT
2009
Springer
15 years 7 months ago
Handling mixed-criticality in SoC-based real-time embedded systems
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
DATE
2006
IEEE
71views Hardware» more  DATE 2006»
15 years 6 months ago
Exploring "temperature-aware" design in low-power MPSoCs
The power density inside high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating “hot spot...
Giacomo Paci, Paul Marchal, Francesco Poletti, Luc...
CASES
2006
ACM
15 years 6 months ago
A dynamic binary instrumentation engine for the ARM architecture
Dynamic binary instrumentation (DBI) is a powerful technique for analyzing the runtime behavior of software. While numerous DBI frameworks have been developed for general-purpose ...
Kim M. Hazelwood, Artur Klauser
111
Voted
VLSISP
2010
148views more  VLSISP 2010»
14 years 11 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...