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» A Decompression Architecture for Low Power Embedded Systems
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104
Voted
HPCA
1996
IEEE
15 years 4 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...
137
Voted
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
15 years 3 months ago
Predictive models for multimedia applications power consumption based on use-case and OS level analysis
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
Patrick Bellasi, William Fornaciari, David Siorpae...
TCOS
2010
14 years 7 months ago
Green Secure Processors: Towards Power-Efficient Secure Processor Design
With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the softwar...
Siddhartha Chhabra, Yan Solihin
125
Voted
AINA
2010
IEEE
14 years 11 months ago
Compensation of Sensors Nonlinearity with Neural Networks
—This paper describes a method of linearizing the nonlinear characteristics of many sensors using an embedded neural network. The proposed method allows for complex neural networ...
Nicholas J. Cotton, Bogdan M. Wilamowski
GLOBECOM
2009
IEEE
14 years 10 months ago
Power Allocation for Cooperative Diversity Networks with Inaccurate CSI: A Robust and Constrained Kalman Filter Approach
In this paper, a novel Kalman filter-based power allocation scheme is developed for cooperative networks with inaccurate channel state information (CSI). The channel estimation err...
Mohamad Khattar Awad, Veluppillai Mahinthan, Xuemi...