714 search results - page 81 / 143 » A Decompression Architecture for Low Power Embedded Systems |
120
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CODES
2010
IEEE
14 years 10 months ago
2010
IEEE
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
121
Voted
DAC
2003
ACM
16 years 1 months ago
2003
ACM
A low power wireless intercom system is designed and implemented. Two fully-operational ASICs, integrating custom and commercial IP, implement the entire digital portion of the pr...
102
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HPCA
2001
IEEE
16 years 29 days ago
2001
IEEE
While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs ...
103
Voted
LCTRTS
2010
Springer
15 years 7 months ago
2010
Springer
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
100
Voted
CASES
2003
ACM
15 years 5 months ago
2003
ACM
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...