714 search results - page 91 / 143 » A Decompression Architecture for Low Power Embedded Systems |
124
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ISORC
2005
IEEE
15 years 6 months ago
2005
IEEE
As complexity of real-time embedded software grows, it is desirable to use formal verification techniques to achieve a high level of assurance. We discuss application of model-ch...
118
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ICCD
2007
IEEE
15 years 4 months ago
2007
IEEE
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
104
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DSN
2004
IEEE
15 years 4 months ago
2004
IEEE
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
87
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DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
Consumer electronics products, such as high-end (digital) TVs, contain complex systems on chip (SOC) that offer high computational performance at low cost. Traditionally, these SO...
104
Voted
DATE
2009
IEEE
15 years 7 months ago
2009
IEEE
—As semiconductor manufacturing enters advanced nanometer design paradigm, aging and device wear-out related degradation is becoming a major concern. Negative Bias Temperature In...