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» A Decompression Architecture for Low Power Embedded Systems
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DAC
2002
ACM
16 years 1 months ago
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor
This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput ...
Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede
107
Voted
ESTIMEDIA
2009
Springer
14 years 10 months ago
Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications
The increasing demand for low power and high performance multimedia embedded systems has motivated the need for effective solutions to satisfy application bandwidth and latency req...
Luis Angel D. Bathen, Yongjin Ahn, Nikil D. Dutt, ...
119
Voted
SAMOS
2004
Springer
15 years 5 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
126
Voted
ICC
2009
IEEE
147views Communications» more  ICC 2009»
15 years 7 months ago
A Distributed Protocol for Virtual Device Composition in Mobile Ad Hoc Networks
— The dynamic composition of systems of networked appliances, or virtual devices, in MANETs, enables users to generate, on-the-fly, complex strong specific systems. Current work ...
Eric Karmouch, Amiya Nayak
117
Voted
CODES
2008
IEEE
15 years 2 months ago
Profiling of lossless-compression algorithms for a novel biomedical-implant architecture
In view of a booming market for microelectronic implants, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core targeting...
Christos Strydis, Georgi Gaydadjiev