Sciweavers

894 search results - page 136 / 179
» A Dependability-Driven System-Level Design Approach for Embe...
Sort
View
CASES
2010
ACM
14 years 10 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
113
Voted
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
14 years 10 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
RTSS
2009
IEEE
15 years 7 months ago
Sloth: Threads as Interrupts
—Traditional operating systems differentiate between threads, which are managed by the kernel scheduler, and interrupt handlers, which are scheduled by the hardware. This approac...
Wanja Hofer, Daniel Lohmann, Fabian Scheler, Wolfg...
106
Voted
ECBS
2006
IEEE
158views Hardware» more  ECBS 2006»
15 years 6 months ago
Automated Translation of C/C++ Models into a Synchronous Formalism
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system l...
Hamoudi Kalla, Jean-Pierre Talpin, David Berner, L...
FDL
2006
IEEE
15 years 6 months ago
Formalizing TLM with Communicating State Machines
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
Bernhard Niemann, Christian Haubelt