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DAC
2005
ACM
16 years 1 months ago
Minimising buffer requirements of synchronous dataflow graphs with model checking
Signal processing and multimedia applications are often implemented on resource constrained embedded systems. It is therefore important to find implementations that use as little ...
Marc Geilen, Twan Basten, Sander Stuijk
116
Voted
CODES
2009
IEEE
15 years 7 months ago
FlexRay schedule optimization of the static segment
The FlexRay bus is the prospective automotive standard communication system. For the sake of a high flexibility, the protocol includes a static time-triggered and a dynamic event...
Martin Lukasiewycz, Michael Glaß, Jürge...
119
Voted
FPGA
2005
ACM
107views FPGA» more  FPGA 2005»
15 years 6 months ago
Instruction set extension with shadow registers for configurable processors
Configurable processors are becoming increasingly popular for modern embedded systems (especially for the field-programmable system-on-a-chip). While steady progress has been made...
Jason Cong, Yiping Fan, Guoling Han, Ashok Jaganna...
108
Voted
LCPC
2004
Springer
15 years 5 months ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
RTSS
2009
IEEE
15 years 7 months ago
Multiprocessor Extensions to Real-Time Calculus
Abstract—Many embedded platforms consist of a heterogeneous collection of processing elements, memory modules, and communication subsystems. These components often implement diff...
Hennadiy Leontyev, Samarjit Chakraborty, James H. ...