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103
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EURODAC
1995
IEEE
153views VHDL» more  EURODAC 1995»
15 years 4 months ago
VHDL-based communication and synchronization synthesis
This paper describes an approach for VHDL-based communication and synchronization synthesis. This design step transforms a system level VHDL description into an RT-level descripti...
Wolfgang Ecker, Manfred Huber
105
Voted
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
15 years 9 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
84
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FDL
2008
IEEE
15 years 2 months ago
Scenario-based Validation of Embedded Systems
This paper describes a scenario-based methodology em-level design validation based on the Abstract State Machines formal method. This scenario-based approach complements an existi...
Angelo Gargantini, Elvinia Riccobene, Patrizia Sca...
EMSOFT
2001
Springer
15 years 5 months ago
A Network-Centric Approach to Embedded Software for Tiny Devices
The ability to incorporate low-power, wireless communication into embedded devices gives rise to a new genre of embedded software that is distributed, dynamic, and adaptive. This p...
David E. Culler, Jason L. Hill, Philip Buonadonna,...
CSREAESA
2003
15 years 1 months ago
Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
Friedhelm Stappert, Carsten Rust