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124
Voted
EURODAC
1995
IEEE
15 years 7 months ago
1995
IEEE
This paper describes an approach for VHDL-based communication and synchronization synthesis. This design step transforms a system level VHDL description into an RT-level descripti...
124
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ICCAD
2003
IEEE
16 years 11 days ago
2003
IEEE
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
108
Voted
FDL
2008
IEEE
15 years 5 months ago
2008
IEEE
This paper describes a scenario-based methodology em-level design validation based on the Abstract State Machines formal method. This scenario-based approach complements an existi...
127
Voted
EMSOFT
2001
Springer
15 years 8 months ago
2001
Springer
The ability to incorporate low-power, wireless communication into embedded devices gives rise to a new genre of embedded software that is distributed, dynamic, and adaptive. This p...
145
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CSREAESA
2003
15 years 4 months ago
2003
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...