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» A Design and Test Technique for Embedded Software
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DATE
2000
IEEE
83views Hardware» more  DATE 2000»
15 years 3 months ago
A New IEEE 1149.1 Boundary Scan Design for the Detection of Delay Defects
Delay defects on I/O pads, interconnections of a board, or interconnections among embedded cores can not be tested with the current IEEE 1149.1 boundary scan design. This paper in...
Sungju Park, Taehyung Kim
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 4 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri
CODES
2010
IEEE
14 years 7 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
VEE
2012
ACM
269views Virtualization» more  VEE 2012»
13 years 6 months ago
SimTester: a controllable and observable testing framework for embedded systems
In software for embedded systems, the frequent use of interrupts for timing, sensing, and I/O processing can cause concurrency faults to occur due to interactions between applicat...
Tingting Yu, Witawas Srisa-an, Gregg Rothermel
RTAS
2006
IEEE
15 years 5 months ago
Adaptive Allocation of Software and Hardware Real-Time Tasks for FPGA-based Embedded Systems
Operating systems for reconfigurable devices enable the development of embedded systems where software tasks, running on a CPU, can coexist with hardware tasks running on a recon...
Rodolfo Pellizzoni, Marco Caccamo