Sciweavers

238 search results - page 46 / 48
» A Distributed Control Path Architecture for VLIW Processors
Sort
View
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
15 years 6 months ago
Correct-by-construction microarchitectural pipelining
— This paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines pre...
Timothy Kam, Michael Kishinevsky, Jordi Cortadella...
DAC
2004
ACM
15 years 10 months ago
Memory access scheduling and binding considering energy minimization in multi-bank memory systems
Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g....
Chun-Gi Lyuh, Taewhan Kim
EUROPAR
2008
Springer
14 years 11 months ago
MPC: A Unified Parallel Runtime for Clusters of NUMA Machines
Over the last decade, Message Passing Interface (MPI) has become a very successful parallel programming environment for distributed memory architectures such as clusters. However, ...
Marc Pérache, Hervé Jourdren, Raymon...
HPCA
2008
IEEE
15 years 10 months ago
Address-branch correlation: A novel locality for long-latency hard-to-predict branches
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zho...
IEEEPACT
2006
IEEE
15 years 3 months ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...