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» A Distributed Performance Analysis Architecture for Clusters
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ICS
2001
Tsinghua U.
15 years 1 months ago
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...
SPAA
1995
ACM
15 years 1 months ago
Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias,...
DAC
2003
ACM
15 years 10 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
SIGCOMM
2005
ACM
15 years 3 months ago
Fast hash table lookup using extended bloom filter: an aid to network processing
Hash table is used as one of the fundamental modules in several network processing algorithms and applications such as route lookup, packet classification, per-flow state manage...
Haoyu Song, Sarang Dharmapurikar, Jonathan S. Turn...
75
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CONEXT
2009
ACM
14 years 10 months ago
Online optimization of 802.11 mesh networks
802.11 wireless mesh networks are ubiquitous, but suffer from severe performance degradations due to poor synergy between the 802.11 CSMA MAC protocol and higher layers. Several s...
Theodoros Salonidis, Georgios Sotiropoulos, Roch G...