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» A Distributed Platform for Mechanism Design
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ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 9 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
COOPIS
2002
IEEE
15 years 9 months ago
Empirical Differences between COTS Middleware Scheduling Strategies
The proportion of complex distributed real-time embedded (DRE) systems made up of commercial-off-the-shelf (COTS) hardware and software is increasing significantly in response to...
Christopher D. Gill, Fred Kuhns, Douglas C. Schmid...
CGO
2004
IEEE
15 years 8 months ago
A Dynamically Tuned Sorting Library
Empirical search is a strategy used during the installation of library generators such as ATLAS, FFTW, and SPIRAL to identify the algorithm or the version of an algorithm that del...
Xiaoming Li, María Jesús Garzar&aacu...
CODES
2004
IEEE
15 years 8 months ago
Operation tables for scheduling in the presence of incomplete bypassing
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
EFDBS
2000
15 years 5 months ago
Citation Linking in Federated Digital Libraries
Today, bibliographical information is kept in a variety of data sources world wide, some of them publically available, and some of them also offering information about citations m...
Eike Schallehn, Martin Endig, Kai-Uwe Sattler