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IEEEPACT
2009
IEEE
16 years 27 days ago
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
Qingda Lu, Christophe Alias, Uday Bondhugula, Thom...
IPPS
2009
IEEE
16 years 26 days ago
Accurate analytical performance model of communications in MPI applications
This paper presents a new LogP-based model, called LoOgGP, which allows an accurate characterization of MPI applications based on microbenchmark measurements. This new model is an...
Diego Rodriguez Martínez, José Carlo...
IPPS
2009
IEEE
16 years 26 days ago
A parallel hybrid genetic algorithm-simulated annealing for solving Q3AP on computational grid
In this paper we propose a parallel hybrid genetic method for solving Quadratic 3-dimensional Assignment Problem (Q3AP). This problem is proved to be computationally NP-hard. The ...
Lakhdar Loukil, Malika Mehdi, Nouredine Melab, El-...
IPPS
2009
IEEE
16 years 26 days ago
Scalability challenges for massively parallel AMR applications
PDE solvers using Adaptive Mesh Refinement on block structured grids are some of the most challenging applications to adapt to massively parallel computing environments. We descr...
Brian van Straalen, John Shalf, Terry J. Ligocki, ...
IPPS
2009
IEEE
16 years 26 days ago
Exploring the multiple-GPU design space
Graphics Processing Units (GPUs) have been growing in popularity due to their impressive processing capabilities, and with general purpose programming languages such as NVIDIA’s...
Dana Schaa, David R. Kaeli
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