1834 search results - page 106 / 367 » A Dynamic Multithreading Processor |
IEEEPACT
2005
IEEE
15 years 8 months ago
2005
IEEE
In this paper we compare the performance of area equivalent small, medium, and large-scale multithreaded chip multiprocessors (CMTs) using throughput-oriented applications. We use...
129
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ICPP
1999
IEEE
15 years 6 months ago
1999
IEEE
Task graph scheduling has been found effective in performance prediction and optimization of parallel applications. A number of static scheduling algorithms have been proposed for...
125
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ASPDAC
2005
ACM
15 years 4 months ago
2005
ACM
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
129
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ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
111
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MICRO
2000
IEEE
15 years 6 months ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...