1834 search results - page 133 / 367 » A Dynamic Multithreading Processor |
104
Voted
SAC
2008
ACM
15 years 2 months ago
2008
ACM
In this work we modify the conventional row buffer allocation mechanism used in DDR2 SDRAM banks to improve average memory latency and overall processor performance. Our method as...
114
Voted
CCGRID
2010
IEEE
15 years 1 months ago
2010
IEEE
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
108
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JSAC
2010
15 years 29 days ago
2010
—The use of passive optical networks (PONs) enables access rates of multi-Gbit/sec bandwidth and provision of quality of service for high definition multimedia services. In this...
119
Voted
DAC
2004
ACM
16 years 3 months ago
2004
ACM
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
107
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ICCD
2003
IEEE
15 years 11 months ago
2003
IEEE
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...