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» A Dynamic Multithreading Processor
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108
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DATE
2009
IEEE
131views Hardware» more  DATE 2009»
15 years 9 months ago
An event-guided approach to reducing voltage noise in processors
Abstract—Supply voltage fluctuations that result from inductive noise are increasingly troublesome in modern microprocessors. A voltage “emergency”, i.e., a swing beyond tol...
Meeta Sharma Gupta, Vijay Janapa Reddi, Glenn H. H...
ICPP
2009
IEEE
15 years 9 months ago
Accelerating Lattice Boltzmann Fluid Flow Simulations Using Graphics Processors
—Lattice Boltzmann Methods (LBM) are used for the computational simulation of Newtonian fluid dynamics. LBM-based simulations are readily parallelizable; they have been implemen...
Peter Bailey, Joe Myre, Stuart D. C. Walsh, David ...
ISCA
2003
IEEE
107views Hardware» more  ISCA 2003»
15 years 7 months ago
Positional Adaptation of Processors: Application to Energy Reduction
Although adaptive processors can exploit application variability to improve performance or save energy, effectively managing their adaptivity is challenging. To address this probl...
Michael C. Huang, Jose Renau, Josep Torrellas
MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
15 years 7 months ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...
JPDC
2010
137views more  JPDC 2010»
15 years 29 days ago
Parallel exact inference on the Cell Broadband Engine processor
—We present the design and implementation of a parallel exact inference algorithm on the Cell Broadband Engine (Cell BE). Exact inference is a key problem in exploring probabilis...
Yinglong Xia, Viktor K. Prasanna