Sciweavers

1834 search results - page 156 / 367
» A Dynamic Multithreading Processor
Sort
View
88
Voted
FPGA
2003
ACM
154views FPGA» more  FPGA 2003»
15 years 7 months ago
Parallel placement for field-programmable gate arrays
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we ...
Pak K. Chan, Martine D. F. Schlag
123
Voted
ICPP
2002
IEEE
15 years 7 months ago
Out-of-Order Instruction Fetch Using Multiple Sequencers
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...
Paramjit S. Oberoi, Gurindar S. Sohi
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 7 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
124
Voted
CGO
2010
IEEE
15 years 7 months ago
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
In this paper we describe techniques for compiling finegrained SPMD-threaded programs, expressed in programming models such as OpenCL or CUDA, to multicore execution platforms. Pr...
John A. Stratton, Vinod Grover, Jaydeep Marathe, B...
119
Voted
IPPS
1998
IEEE
15 years 7 months ago
COMPaS: A Pentium Pro PC-based SMP Cluster and Its Experience
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...
Yoshio Tanaka, Motohiko Matsuda, Makoto Ando, Kazu...