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» A Dynamic Multithreading Processor
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ICCD
2001
IEEE
140views Hardware» more  ICCD 2001»
16 years 1 months ago
Cost-effective Hardware Acceleration of Multimedia Applications
General-purpose microprocessors augmented with SIMD execution units enhance multimedia applications by exploiting data level parallelism. However, supporting/overhead related inst...
Deependra Talla, Lizy Kurian John
130
Voted
ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
16 years 1 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
15 years 11 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
ISCA
2009
IEEE
276views Hardware» more  ISCA 2009»
15 years 11 months ago
PIPP: promotion/insertion pseudo-partitioning of multi-core shared caches
Many multi-core processors employ a large last-level cache (LLC) shared among the multiple cores. Past research has demonstrated that sharing-oblivious cache management policies (...
Yuejian Xie, Gabriel H. Loh
SAMOS
2009
Springer
15 years 11 months ago
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems
Abstract. In this paper, we present a particularly lightweight, integrative approach to programming and executing applications targeting heterogeneous, dynamically reconfigurable ...
Rainer Buchty, Mario Kicherer, David Kramer, Wolfg...