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CGO
2003
IEEE
15 years 11 months ago
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
Howard Chen, Wei-Chung Hsu, Dong-yuan Chen
GECCO
2007
Springer
212views Optimization» more  GECCO 2007»
16 years 15 days ago
A hybrid evolutionary programming algorithm for spread spectrum radar polyphase codes design
This paper presents a hybrid evolutionary programming algorithm to solve the spread spectrum radar polyphase code design problem. The proposed algorithm uses an Evolutionary Progr...
Ángel M. Pérez-Bellido, Sancho Salce...
ICS
2009
Tsinghua U.
16 years 1 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
TACO
2008
130views more  TACO 2008»
15 years 6 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
CGO
2007
IEEE
16 years 21 days ago
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications
Run-time compilation systems are challenged with the task of translating a program’s instruction stream while maintaining low overhead. While software managed code caches are ut...
Vijay Janapa Reddi, Dan Connors, Robert Cohn, Mich...