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» A Fast FPGA Implementation of a General Purpose Neuron
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74
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FPL
2009
Springer
99views Hardware» more  FPL 2009»
15 years 2 months ago
Exploiting fast carry-chains of FPGAs for designing compressor trees
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
FPGA
1995
ACM
113views FPGA» more  FPGA 1995»
15 years 1 months ago
High-Energy Physics on DECPeRLe-1 Programmable Active Memory
The future Large Hadron Collider (LHC) to be built at CERN1, by the turn of the millenium, provides an ample source of challenging real-time computational problems. We report here...
Laurent Moll, Jean Vuillemin, Philippe Boucard
DAC
2005
ACM
15 years 10 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
92
Voted
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
15 years 1 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
14 years 9 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek