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ARC
2010
Springer
183views Hardware» more  ARC 2010»
14 years 10 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
RTAS
2008
IEEE
15 years 4 months ago
Distributed Resource Kernels: OS Support for End-To-End Resource Isolation
The notion of resource reservation for obtaining real-time scheduling guarantees and enforcement of resource usage has gained strong support in recent years. However, much work on...
Karthik Lakshmanan, Raj Rajkumar
RTAS
2005
IEEE
15 years 4 months ago
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
Sibin Mohan, Frank Mueller, David B. Whalley, Chri...
ESCIENCE
2007
IEEE
15 years 4 months ago
Aneka: Next-Generation Enterprise Grid Platform for e-Science and e-Business Applications
In this paper, we present the design of Aneka, a .NET based service-oriented platform for desktop grid computing that provides: (i) a configurable service container hosting plugga...
Xingchen Chu, Krishna Nadiminti, Chao Jin, Srikuma...
CODES
2004
IEEE
15 years 2 months ago
Tuning SoC platforms for multimedia processing: identifying limits and tradeoffs
We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing m...
Alexander Maxiaguine, Yongxin Zhu, Samarjit Chakra...