2419 search results - page 327 / 484 » A Formal Approach to Software Testing |
142
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CAV
2000
Springer
15 years 7 months ago
2000
Springer
Hierarchical state machines is a popular visual formalism for software specifications. To apply automated analysis to such specifications, the traditional approach is to compile th...
112
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USS
2008
15 years 6 months ago
2008
For the last few years, many commodity computers have come equipped with a Trusted Platform Module (TPM). Existing research shows that the TPM can be used to establish trust in th...
148
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GPCE
2008
Springer
15 years 4 months ago
2008
Springer
Building complex component-based software architectures can lead to subtle assemblage errors. In this paper, we introduce a typesystem-based approach to avoid message handling err...
137
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SIGPLAN
2008
15 years 3 months ago
2008
Many organizations specify information release policies to describe the terms under which sensitive information may be released to other organizations. This paper presents a new a...
135
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VLSI
2007
Springer
15 years 10 months ago
2007
Springer
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...