222 search results - page 21 / 45 » A Formal Verification Methodology for Checking Data Integrit... |
100
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CCS
1998
ACM
15 years 4 months ago
1998
ACM
This paper gives a mathematical specification the Java Virtual Machine (JVM) bytecode verifier. The specification is an axiomatic description of the verifier that makes precise su...
FDL
2007
IEEE
15 years 3 months ago
2007
IEEE
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
115
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RE
2010
Springer
14 years 6 months ago
2010
Springer
Secure software engineering is a new research area that has been proposed to address security issues during the development of software systems. This new area of research advocates...
117
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SIGSOFT
2007
ACM
16 years 15 days ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
IIWAS
2008
15 years 1 months ago
2008
In a service-oriented architecture, systems communicate by exchanging messages. In this work, we propose a formal model based on OCL-constrained UML Class diagrams and a methodolo...