1763 search results - page 157 / 353 » A Formalization of Polytime Functions |
130
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APLAS
2009
ACM
15 years 10 months ago
2009
ACM
We propose a method for easily developing efficient programs for finding optimal sequences, such as the maximum weighted sequence of a set of feasible ones. We formalize a way to ...
118
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ISVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
127
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ECML
2007
Springer
15 years 10 months ago
2007
Springer
Many applications in information retrieval, natural language processing, data mining, and related fields require a ranking of instances with respect to a specified criteria as op...
ICANN
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. This paper introduces the notion of the variadic neural network (VNN). The inputs to a variadic network are an arbitrary-length list of n-tuples of real numbers, where n ...
103
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...