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» A Formalization of the Turing Test
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DFT
2007
IEEE
123views VLSI» more  DFT 2007»
15 years 8 months ago
Checker Design for On-line Testing of Xilinx FPGA Communication Protocols
In the paper, a methodology of developing checkers for communication protocol testing is presented. It was used to develop checker to test IP cores communication protocol implemen...
Martin Straka, Jiri Tobola, Zdenek Kotásek
FM
2009
Springer
153views Formal Methods» more  FM 2009»
14 years 11 months ago
Iterative Refinement of Reverse-Engineered Models by Model-Based Testing
Abstract. This paper presents an iterative technique to accurately reverseengineer models of the behaviour of software systems. A key novelty of the approach is the fact that it us...
Neil Walkinshaw, John Derrick, Qiang Guo
CHARME
2003
Springer
97views Hardware» more  CHARME 2003»
15 years 5 months ago
Coverage Metrics for Formal Verification
In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complete ...
Hana Chockler, Orna Kupferman, Moshe Y. Vardi
ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler
EMNLP
2008
15 years 3 months ago
Mining and Modeling Relations between Formal and Informal Chinese Phrases from Web Corpora
We present a novel method for discovering and modeling the relationship between informal Chinese expressions (including colloquialisms and instant-messaging slang) and their forma...
Zhifei Li, David Yarowsky