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» A Framework for Analyzing Parallel Simulation Performance
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ISCAS
2005
IEEE
146views Hardware» more  ISCAS 2005»
15 years 3 months ago
A novel approach for network on chip emulation
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
15 years 3 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
HPCA
2005
IEEE
15 years 10 months ago
A Unified Compressed Memory Hierarchy
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
Erik G. Hallnor, Steven K. Reinhardt
EUROPAR
2005
Springer
15 years 3 months ago
Integrating Mobile Devices into the Grid: Design Considerations and Evaluation
Mobile devices increasingly offer functionality beyond the one provided by traditional resources – processor, memory and applications. This includes, for example, integrated mul...
Stavros Isaiadis, Vladimir Getov
CORR
2010
Springer
195views Education» more  CORR 2010»
14 years 9 months ago
Dynamic management of transactions in distributed real-time processing system
Managing the transactions in real time distributed computing system is not easy, as it has heterogeneously networked computers to solve a single problem. If a transaction runs acr...
Y. Jayanta Singh, Yumnam Somananda Singh, Ashok Ga...