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» A Framework for Scheduler Synthesis
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ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
15 years 1 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
RTS
2002
106views more  RTS 2002»
14 years 11 months ago
Cello: A Disk Scheduling Framework for Next Generation Operating Systems
In this paper, we present the Cello disk scheduling framework for meeting the diverse service requirements of applications. Cello employs a two-level disk scheduling architecture,...
Prashant J. Shenoy, Harrick M. Vin
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
15 years 6 months ago
Scheduling of Fault-Tolerant Embedded Systems with Soft and Hard Timing Constraints
In this paper we present an approach to the synthesis of fault-tolerant schedules for embedded applications with soft and hard real-time constraints. We are interested to guarante...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
ECRTS
2008
IEEE
15 years 6 months ago
Hierarchical Scheduling Framework for Virtual Clustering of Multiprocessors
Scheduling of sporadic task systems on multiprocessor platforms is an area which has received much attention in the recent past. It is widely believed that finding an optimal sch...
Insik Shin, Arvind Easwaran, Insup Lee
RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
15 years 4 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...