1420 search results - page 20 / 284 » A Framework for Scheduler Synthesis |
ISQED
2005
IEEE
15 years 5 months ago
2005
IEEE
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
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VLSID
2003
IEEE
16 years 5 days ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
RTSS
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper presents algorithms that (1) facilitate systemindependent synthesis of timing-interfaces for subsystems and (2) system-level selection of interfaces to minimize CPU loa...
ASPDAC
1995
ACM
15 years 3 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
Microfluidics-based biochips offer a promising platform for massively parallel DNA analysis, automated drug discovery, and real-time biomolecular recognition. Current techniques f...