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» A Framework for Scheduler Synthesis
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CODES
2007
IEEE
15 years 8 months ago
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
Mark Thompson, Hristo Nikolov, Todor Stefanov, And...
ISVLSI
2007
IEEE
205views VLSI» more  ISVLSI 2007»
15 years 8 months ago
An Automated Passive Analog Circuit Synthesis Framework using Genetic Algorithms
In this work, we present a genetic algorithm based automated circuit synthesis framework for passive analog circuits. A procedure is developed for the simultaneous generation of b...
Angan Das, Ranga Vemuri
CODES
2005
IEEE
15 years 7 months ago
Rappit: framework for synthesis of host-assisted scripting engines for adaptive embedded systems
Scripting is a powerful, high-level, cross-platform, dynamic, easy way of composing software modules as black boxes. Unfortunately, the high runtime overhead has prevented scripti...
Jiwon Hahn, Qiang Xie, Pai H. Chou
142
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INTEGRATION
2006
102views more  INTEGRATION 2006»
15 years 1 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...
SIGGRAPH
1997
ACM
15 years 6 months ago
A framework for realistic image synthesis
Our goal is to develop physically based lighting models and perceptually based rendering procedures for computer graphics that will produce synthetic images that are visually and ...
Donald P. Greenberg, Kenneth E. Torrance, Peter Sh...