Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
In this paper, a novel framework is developed to support personalized news video recommendation. First, multi-modal information sources for news videos are seamlessly integrated an...
Hangzai Luo, Jianping Fan, Daniel A. Keim, Shin'ic...
Abstract—The Reliable Server Pooling (RSerPool) architecture is the IETF’s new standard for a lightweight server redundancy and session failover framework to support availabili...
Xing Zhou, Thomas Dreibholz, Fu Fa, Wencai Du, Erw...
—How to efficiently use the air interface is a crucial issue in wireless networks. In order to improve the performance, mechanisms have been proposed to improve the reach and th...