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DAC
2009
ACM
15 years 10 months ago
2009
ACM
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...