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DAC
2005
ACM
16 years 5 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
147
Voted
DAC
2005
ACM
16 years 5 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
DAC
2005
ACM
16 years 5 months ago
User-perceived latency driven voltage scaling for interactive applications
Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as...
Le Yan, Lin Zhong, Niraj K. Jha
DAC
2006
ACM
16 years 5 months ago
Timing-driven Steiner trees are (practically) free
Traditionally, rectilinear Steiner minimum trees (RSMT) are widely used for routing estimation in design optimizations like floorplanning and physical synthesis. Since it optimize...
Charles J. Alpert, Andrew B. Kahng, Cliff C. N. Sz...
DAC
2006
ACM
16 years 5 months ago
BoxRouter: a new global router based on box expansion and progressive ILP
In this paper, we propose a new global router, BoxRouter, powered by the concept of box expansion and progressive integer linear programming (ILP). BoxRouter first uses a simple P...
Minsik Cho, David Z. Pan
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