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139
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CODES
2008
IEEE
15 years 10 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
143
Voted
CODES
2008
IEEE
15 years 10 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
CODES
2008
IEEE
15 years 10 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
124
Voted
DATE
2008
IEEE
148views Hardware» more  DATE 2008»
15 years 10 months ago
On Analysis and Synthesis of (n, k)-Non-Linear Feedback Shift Registers
— Non-Linear Feedback Shift Registers (NLFSRs) have been proposed as an alternative to Linear Feedback Shift Registers (LFSRs) for generating pseudo-random sequences for stream c...
Elena Dubrova, Maxim Teslenko, Hannu Tenhunen
DSN
2008
IEEE
15 years 10 months ago
Probabilistic quorum systems in wireless ad hoc networks
Quorums are a basic construct in solving many fundamental distributed computing problems. One of the known ways of making quorums scalable and efficient is by weakening their int...
Roy Friedman, Gabriel Kliot, Chen Avin
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