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DAC
2008
ACM
15 years 1 months ago
Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
Min Ni, Seda Ogrenci Memik
DAC
2008
ACM
15 years 1 months ago
DeMOR: decentralized model order reduction of linear networks with massive ports
Model order reduction is an efficient technique to reduce the system complexity while producing a good approximation of the input-output behavior. However, the efficiency of reduc...
Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie C...
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
15 years 1 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
DEBS
2008
ACM
15 years 1 months ago
Extending Siena to support more expressive and flexible subscriptions
This paper defines and discusses the implementation of two novel extensions to the Siena Content-based Network (CBN) to extend it to become a Knowledge-based Network (KBN) thereby...
John Keeney, Dominik Roblek, Dominic Jones, David ...
DEXAW
2008
IEEE
126views Database» more  DEXAW 2008»
15 years 1 months ago
Meta Analysis within Authorship Verification
In an authorship verification problem one is given writing examples from an author A, and one is asked to determine whether or not each text in fact was written by A. In a more ge...
Benno Stein, Nedim Lipka, Sven Meyer zu Eissen
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